The present invention concerns an improvement to a video display terminal which is communicating with a data processing system.
It is known in the data processing arts to provide a multi-terminal data processing system in which a central processor and large central memory are shared by a number of intelligent terminals. User application programs and data are stored in the central memory. The central processor provides time-multiplexed access to the central memory by the terminals and may provide inter-terminal communications. Each intelligent terminal contains a keyboard for the entry of data and commands and a video display unit for displaying information to the user.
In such a system it is desirable to minimize the time that the central processor spends servicing each terminal, since by minimizing this time the size of the central processor may be kept relatively small. Alternatively, relatively more terminals may be serviced from the central processor.
It is known to provide "intelligence" at each terminal in the form of one or more terminal processors, terminal memories, and associated circuitry, in order to reduce the workload on the central processor. The terminal processor ordinarily requires at least some terminal memory to store routines and data to perform its various functions, which may include power-up and boot-loading, keyboard input, video display, printing, and communicating.
To reduce the workload on the terminal processor, it is known to improve terminal processor throughput by providing a separate video memory for storing data to be displayed on the screen. This avoids the necessity of the terminal processor sharing its memory workspace with the video display memory and consequently losing bus cycles every time a display memory access is made. By providing a separate video display memory, the terminal processor does not lose any bus cycles during screen refresh operations.
However, even in the data processing system just described a relatively large number of terminal processor operations and bus cycles are still required whenever data is updated or scrolled on the screen.
The present invention solves this problem by coupling a video memory controller, which in a preferred embodiment of the invention assumes the form of a direct memory address (DMA) controller, between the terminal processor and the video memory. The video memory controller operates in response to a variety of different commands from the terminal processor. In many cases an entire screen line or line segment may be accessed from the video memory in response to a single terminal processor command. This significantly reduces the workload of the terminal processor.
In prior art video display terminals, vertical scrolling could be performed only on an entire row. Moreover, each horizontal scrolling operation rippled from the top to the bottom of the entire screen.
It is another advantage of the present invention, as part of the repertoire of terminal processor commands, that the video display unit can perform vertical scrolling between any defined vertical lines on the screen (e.g. between columns 5 and 25). Moreover, in a display system which contains a multiplicity of independent screen areas, each displaying information relating to different portions of the same program or to different programs, these independent screen areas can be individually scrolled, each by a single terminal processor instruction.
It is another feature of the present invention that the video display unit can perform a "fill" operation on any line or line segment of any video display area of the screen. In a "fill" operation a line or line segment is filled with blanks or any other desired screen symbol or character.
In addition, the present invention provides the current location of the cursor within each screen display area.